RISC vs. CISC | Clipmarks


	RISC vs. CISC

antiw

1-8-2007 7:53 PM

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tags:

risc, cisc, architecture, computers, os

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<div style="margin: 12px 0px; font-family: arial; color: #333333; background: #ffffff; border: solid 4px #e5e5e5; width: 100%; clear: left;"><div class="CM_CTB_Content_Wrap" style="margin: 0px; padding: 0px;background-color: #ffffff;"><div style="border-bottom: solid 1px #dcdcdc; white-space: nowrap; margin-bottom: 8px; background-color: #eeeeee ;background-image: url(http://www.clipmarks.com/images/source-bg.gif); background-repeat: repeat-x; height: 24px; line-height: 24px; vertical-align: middle; padding-bottom: 4px; color: #666666; font-size: 10px;" ><a href="http://clipmarks.com/clip-to-blog/" title="see clips that are hot right now"><img src="http://content.clipmarks.com/blog_embed/b046bb40-43d5-46c5-98bb-974d2898eb62/0D4ABFCE-B964-437B-94FD-849541233801/" alt="" width="19" height="19" border="0" style="vertical-align: middle; margin: 0px 4px; display: inline; border: none; float:none;" /></a>clipped from <a title="http://cse.stanford.edu/class/sophomore-college/projects-00/risc/risccisc/index.html" href="http://cse.stanford.edu/class/sophomore-college/projects-00/risc/risccisc/index.html" style="font-size: 11px;">cse.stanford.edu</a></div><blockquote style="text-align: left; padding: 0px 8px; margin: 4px 0px 8px 0px; background: transparent; border: none;" cite="http://cse.stanford.edu/class/sophomore-college/projects-00/risc/risccisc/index.html"><P><FONT size="-1" face="Verdana%2CArial"><FONT size="-1"><B>The Performance Equation</B>
The following equation is commonly used for expressing a computer's
performance ability:</FONT></FONT></P><P>
</P><CENTER>
<FONT size="-1" face="Verdana%2CArial"><FONT size="-1"><IMG border="0" src="http://cse.stanford.edu/class/sophomore-college/projects-00/risc/risccisc/options/performanceeq.gif" /> </FONT></FONT><P>
</P></CENTER>
<FONT size="-1" face="Verdana%2CArial"><FONT size="-1">The CISC approach attempts to minimize the number of instructions
per program, sacrificing the number of cycles per instruction. RISC does
the opposite, reducing the cycles per instruction at the cost of the number
of instructions per program.</FONT></FONT></blockquote></div><div style="margin: 0px 6px 6px 4px;"><table style="font-size: 11px;border-spacing: 0px;padding: 0px;" cellpadding="0" cellspacing="0" width="100%"><tr><td style="background:transparent;border-width:0px;padding:0px;">&nbsp;</td><td align="right" style="background:transparent;border-width:0px;padding:0px;width:107px" width="107"><a href="http://clipmarks.com/share/0D4ABFCE-B964-437B-94FD-849541233801/blog/" title="blog or email this clip"><img src="http://content8.clipmarks.com/images/c2b-foot.png" border="0" alt="blog it" width="107" height="17" style="border-width:0px;padding:0px;margin:0px;" /></a></td></tr></table></div></div>

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